The changes in the errata files are accumulated in each release. This article includes a list of references , but its sources remain unclear because it has insufficient inline citations. This revision is an editorial update from 0. The xHCI architecture was designed to be highly scalable, capable of supporting 1 to USB devices and 1 to root hub ports. Standards Intel standards and global initiatives enable technological innovations to Enhanced host controller interface EHCI specification Information includes licensing, revisions, addendums, and technical questions.

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Learn how and when to remove these template messages. If a low-speed or full-speed USB device is attached to connectors 1 or 2, it will be routed to the root hub ports of one of the OHCI controllers for management, and low-speed and full-speed USB devices attached to connectors 3 or 4 will be routed to the root hub ports of the other OHCI controller.

Extensible Host Controller Interface – Wikipedia

Architectural overview, operational model, and more for extensible host Please help to improve this article by introducing more precise citations.

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The xHCI specification uses “errata” files to define updates and clarifications to a specific release. Retrieved from ” https: Wikimedia Commons has media related to USB. April Learn how and when to remove this template message. Also USB endpoint activity tends to be bursty. This revision is an editorial update from 0.


The USB data transfers associated with a USB Stream endpoint are scheduled by the xHCI the same shci any other bulk endpoint is, however the data buffer associated with a transfer is determined by the enci. Archived from the original PDF on The latest revision of the specification is Revision 1. Legacy USB host-controller interfaces define a relatively simple hardware data-pump; where critical state related to overall bus-management bandwidth allocation, address assignment, etc.

Provides technical details necessary to understand USB 3.

If a computer provides non-x86 USB 1. Peripheral and IP vendors will be able to develop their designs, insulated from the high-speed and analog circuitry issues associated with the USB 2. Allows host controller hardware cmopliant safely prefetch information from the asynchronous and periodic schedules beyond what was defined in previous EHCI implementations to improve system memory access behavior Enhanced Host Controller Interface specification for Universal Serial Bus addendum, version 1.

The contexts are designed so that they can be cached by the xHCI, and “paged” in and out as a function of endpoint activity.

Host controller interface (USB, Firewire)

Legacy USB host-controller architectures exhibit some serious shortcomings when applied to virtualized environments.

Intel hosted EHCI conformance-testing and this helped to prevent the incursion of proprietary ehcl.

This specification is intended for hardware component designers, system builders and device driver software developers. Adopters Agreement in order to be licensed to use and implement this specification.

Typically only a small number of USB devices are attached to a system at one time, and on the average a USB device supports endpoints, of which only a subset of the endpoints are active at the same time. All current development should be targeting this revision of the specification. EHCI compliance testing program Adopters can demonstrate compliance of their product s with the specification through the EHCI compliance testing program provided by Intel. The complete Revision 1.


It has many fewer intellectual property restrictions than UHCI.

Document Library

Technical details necessary to understand USB 2. This document defines an interface to which ASIC and peripheral vendors can develop. EHCI was designed [ by whom? The Wikibook Serial Programming: Refer any questions about the specification or licensing program complant EHCI Support by clicking on one of the following links:.

Because the card has a standard OHCI interface, the OS does not need to know in advance exactly who makes the card or how it works; it can safely assume that the card understands the set of well-defined commands that are defined in the standard protocol.

Changes that are determined to be architectural utilize a Capability flag to determine whether a particular feature is supported by an xHCI implementation, and an Enable flag to turn on the feature.

When USB was originally developed init was targeted at desktop platforms to stem the proliferation of connectors that were appearing on PCs, e.